Not flat due to Early effect (channel length modulation) In BJTs - Base Modulation Effects Not flat due to Early effect (channel length modulation) Increasing Vd effects the drain-to-channel region: increases barrier height increases depletion width ( ) e I u V T d g S - = / k ( ) I = I e KV / u e - V / u - e - V / u G T S T D T DS ( ) ( ) k ( ) = V - V / u - I e 1 - e V V / u g S T d S T ( ) = I e ( KV - V ) / u 1 - e - V / u G S T dS T = I e ( KV - V ) / u G S Tġ7 Channel Current Dependence on Gate Voltageġ8 Channel Current Dependence on Gate VoltageĠ.4 0.45 0.5 0.55 0.6 0.65 0.7 0.75 0.8 0.85 0.9 10 -11 -10 -9 -8 -7 -6 Gate voltage (V) Drain current (A) k = Io = fA In linear scale, we have a quadratic dependence In log-scale, we have an exponential dependenceĠ.4 0.5 0.6 0.7 0.8 0.9 1 0.1 0.2 0.3 1.1 Gate voltage (V) Drain current / subthreshold fit VT = 0.86Ġ.6 0.65 0.7 0.75 0.8 0.85 0.9 10 -12 -11 -10 -9 -8 -7 Gate voltage (V) Drain current (A) UT = 25.84mV k = 0.545 In linear scale, we have a quadratic dependence In log-scale, we have an exponential dependenceġ5 ( ) I = I e - e ( ) ( ) d n Dn = dx No recombination Dn = Ax + B l dnĢ n No recombination Dn = Dn = Ax + B dx 2 dn d D n 2 = D + G - R dt n dx 2 l y varies as kVG dn n - n (qDn / l) (e-(Y - Vs)/UT - e-(Y - Vd)/UT) J = qD = qD source drain = n dx n l ( ) ( ) ( ) k V - V / u k V - V / u I = I e - g S T e g d T Use subthreshold operation as the fundamental case Sub-VT operation simplifies this 2D problem to 2 1D problems Allows intuition across sub-VT and above-VT operationġ0 Channel Current Dependence on Gate Voltage (n-well) CMOS Process = nFETs and pFETs are available all p-n junction must be reversed bias We create a silicon-oxide “stencil” (or mask) We get highly repeatable gates because the gate acts as a stencil as well N-type ND P-type NA First-Principles Modelĥ A MOSFET Transistor Source Drain Gate Drain Gate Source SubstrateĦ Self-Aligned Process How do we make a basic transistor element? Ec qDV Ec E0 Ec Ef Case I: P(E) ~ exp( - E0 /kT) Case II: P(E) ~ exp( - ( E0 - qDV)/kT) Ratio of Case II to Case I = 1 P(E) = ~ e-(E-Ef)/kT 1 + e-(E-Ef)/kT exp( DV / UT ) UT = kT/qģ P-N Junctions Depletion Layer or Region N-type ND P-type NA qND Charge

Mosfet download